Design and Implementation of an FPGA-Based Anti-Jamming System

Project Overview

The FPGA-Based Anti-Jamming System is a hardware–software co-designed solution aimed at enhancing the reliability of communication signals in environments affected by interference and intentional jamming. The system utilizes a multi-channel antenna architecture combined with advanced signal processing techniques to isolate and recover useful signals from noise and disruption.

The development process begins with system modeling and algorithm validation in MATLAB, followed by conversion into RTL for implementation on FPGA hardware. Real-time signal acquisition and analysis are supported through RF receivers and software-defined radio platforms such as KrakenSDR, enabling robust testing and validation under realistic conditions.

System Architecture

The system operates across two interconnected processing layers — a GPS simulation layer handling signal transmission via HackRF and Raspberry Pi, and an adaptive processing layer using a Uniform Circular Array Antenna feeding 5-channel coherent GPS signals into the KrakenSDR, which applies custom MATLAB algorithms to recover clean GPS streams.

Figure 1: GPS Simulation & Adaptive Processing Layers

MATLAB Simulation & Results

MATLAB-based validation of the adaptive beamforming algorithms, showing PRN correlation outputs across multiple satellite channels. The 3D correlation plots demonstrate successful signal acquisition and tracking after anti-jamming processing is applied, with clear PRN peaks visible above the noise floor across the tested satellite channels.

Figure 2: PRN Correlation Outputs across tested satellite channels